| BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
| BODY LENGTH | 0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM |
| BODY WIDTH | 0.160 INCHES MINIMUM AND 0.185 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-85 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| DESIGN FUNCTION AND QUANTITY | 4 GATE, NAND-NOR |
| FEATURES PROVIDED | MONOLITHIC AND HERMETICALLY SEALED AND GATED OUTPUT AND NEGATIVE OUTPUTS AND POSITIVE OUTPUTS |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC AND METAL |
| INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| MAXIMUM POWER DISSIPATION RATING | 22.0 MILLIWATTS |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| STORAGE TEMP RANGE | -65.0 TO 200.0 CELSIUS |
| TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 8.0 VOLTS MAXIMUM POWER SOURCE |