| BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
| BODY LENGTH | 0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM |
| BODY WIDTH | 0.160 INCHES MINIMUM AND 0.185 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-85 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| DESIGN FUNCTION AND QUANTITY | 1 SHIFT REGISTER, RIGHT SHIFT, LEFT SHIFT |
| FEATURES PROVIDED | MONOLITHIC AND HERMETICALLY SEALED AND MEDIUM SPEED AND POSITIVE OUTPUTS AND W/ENABLE AND W/STROBE |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| INPUT CIRCUIT PATTERN | 7 INPUT |
| MAXIMUM POWER DISSIPATION RATING | 180.0 MILLIWATTS |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| STORAGE TEMP RANGE | -65.0 TO 200.0 CELSIUS |
| TEST DATA DOCUMENT | 03848-7-62508 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 100.00 NANOSECONDS NOMINAL PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT |